via.inc.html; generated on Fri Sep 18 21:44:54 2015 by ca65html
uz@cc65.org
1: VIA_O_PB := 0
2: VIA_O_PA := 1
3: VIA_O_DDRB := 2
4: VIA_O_DDRA := 3
5: VIA_O_T1CL := 4
6: VIA_O_T1CH := 5
7: VIA_O_T1CLL := 6
8: VIA_O_T1CHL := 7
9: VIA_O_T2CL := 8
10: VIA_O_T2CH := 9
11: VIA_O_SR := 10
12: VIA_O_ACR := 11
13: VIA_O_PCR := 12
14: VIA_O_IFR := 13
15: VIA_O_IEC := 14
16: VIA_O_PA_NO_HS := 15
17:
18: VIA_IFR_B_CA2 := $01 ; cleared by read or write to PA
19: VIA_IFR_B_CA1 := $02 ; cleared by read or write to PA
20: VIA_IFR_B_SR := $04 ; cleared by read or write to SR
21: VIA_IFR_B_CB2 := $08 ; cleared by read or write to PB
22: VIA_IFR_B_CB1 := $10 ; cleared by read or write to PB
23: VIA_IFR_B_T2 := $20 ; cleared by read T2L or write T2H
24: VIA_IFR_B_T1 := $40 ; cleared by read T1L or write T1H
25: VIA_IFR_B_ANY := $80 ; cleared if all interrupts are cleared
26:
27: VIA_IER_B_CA2 := VIA_IFR_B_CA2
28: VIA_IER_B_CA1 := VIA_IFR_B_CA1
29: VIA_IER_B_SR := VIA_IFR_B_SR
30: VIA_IER_B_CB2 := VIA_IFR_B_CB2
31: VIA_IER_B_CB1 := VIA_IFR_B_CB1
32: VIA_IER_B_T2 := VIA_IFR_B_T2
33: VIA_IER_B_T1 := VIA_IFR_B_T1
34: VIA_IER_BW_SET := $80
35: VIA_IER_BW_UNSET := $00
36:
37: VIA_PCR_B_CA1_INPUT_POS_EDGE := $01 ; 1 = input on positive edge, 0 = input on negative edge
38: VIA_PCR_B_CA2_MASK := $0E
39: VIA_PCR_B_CA2_INPUT_NEG_CLEAR_ON_READ := $00
40: VIA_PCR_B_CA2_INPUT_NEG := $02
41: VIA_PCR_B_CA2_INPUT_POS_CLEAR_ON_READ := $04
42: VIA_PCR_B_CA2_INPUT_POS := $06
43: VIA_PCR_B_CA2_OUTPUT_HANDSHAKE := $08
44: VIA_PCR_B_CA2_OUTPUT_PULSE := $0A
45: VIA_PCR_B_CA2_OUTPUT_LOW := $0C
46: VIA_PCR_B_CA2_OUTPUT_HIGH := $0E
47: VIA_PCR_B_CB1_INPUT_POS_EDGE := $10 ; 1 = input on positive edge, 0 = input on negative edge
48: VIA_PCR_B_CB2_MASK := $E0
49: VIA_PCR_B_CB2_INPUT_NEG_CLEAR_ON_READ := $00
50: VIA_PCR_B_CB2_INPUT_NEG := $20
51: VIA_PCR_B_CB2_INPUT_POS_CLEAR_ON_READ := $40
52: VIA_PCR_B_CB2_INPUT_POS := $60
53: VIA_PCR_B_CB2_OUTPUT_HANDSHAKE := $80
54: VIA_PCR_B_CB2_OUTPUT_PULSE := $A0
55: VIA_PCR_B_CB2_OUTPUT_LOW := $C0
56: VIA_PCR_B_CB2_OUTPUT_HIGH := $E0
57:
58: VIA_ACR_B_PA_LATCH_ENABLE := $01
59: VIA_ACR_B_PB_LATCH_ENABLE := $02
60: VIA_ACR_B_SHIFT_MASK := $1C
61: VIA_ACR_B_SHIFT_DISABLED := $00
62: VIA_ACR_B_SHIFT_IN_T2 := $04
63: VIA_ACR_B_SHIFT_IN_PHI2 := $08
64: VIA_ACR_B_SHIFT_IN_EXTCLOCK_CB1 := $0C
65: VIA_ACR_B_SHIFT_FREERUNNING_T2 := $10
66: VIA_ACR_B_SHIFT_OUT_T2 := $14
67: VIA_ACR_B_SHIFT_OUT_PHI2 := $18
68: VIA_ACR_B_SHIFT_OUT_EXTCLOCK_CB1 := $1C
69: VIA_ACR_B_T2_CONTROL_PB6 := $20
70: VIA_ACR_B_T1_CONTROL_MASK := $C0
71: VIA_ACR_B_T1_CONTROL_ONESHOT := $00
72: VIA_ACR_B_T1_CONTROL_FREERUN := $40
73: VIA_ACR_B_T1_CONTROL_ONESHOT_PB7 := $80
74: VIA_ACR_B_T1_CONTROL_FREERUN_PB7 := $C0
75:
76: ; Alternative:
77: VIA_ACR_B_T1_CONTROL_ONETIME := $40
78: VIA_ACR_B_T1_CONTROL_PB7_OUTPUT := $80